It is important to increase the strength against external stress of a semiconductor integrated circuit chip (also referred to as an IC chip) that is further downsized and thinned.
A variety of methods for strengthening chips have been proposed to increase the strength of chips (see Patent Document 1: Japanese Published Patent Application No. 2006-139802). For example, Patent Document 1 discloses the method in which a chip is sandwiched between reinforcing metal plates, covered with a sealing resin, and hardened.
Further, a semiconductor integrated circuit chip carried to be used has a problem in that it is broken (electrostatic breakdown occurs) due to external electrostatic discharge in being carried, stored, and used, and the measure for the problem is also disclosed (see Patent Document 2: Japanese Published Patent Application No. 2000-231619).
In Patent Document 2, a semiconductor integrated circuit chip that is being carried and stored can be increased in tolerance for breakage due to electrostatic discharge caused by the fact that all external terminals are short-circuited.    [Patent Document 1] Japanese Published Patent Application No. 2006-139802    [Patent Document 2] Japanese Published Patent Application No. 2000-231619